Device and method for self-adjusting an electrical threshold for detecting a power failure

ABSTRACT

A device for selfadjusting an electrical threshold for detecting an electric power consumption failure of an electric charge comprises a plurality of reference signals of increasing values according to a geometric sequence, a setpoint signal representative of the supply signal of the electric charge, a framing unit including a plurality of successive intervals of reference signals successively bounded by the terms of the geometric sequence, a setpoint signal, a plurality of binary output signals, and a logic signal processing means configured to assign to a first binary output signal of the plurality of binary output signals a binary state of belonging of the setpoint signal to a first interval, at least one electrical switch configured to be controlled by the first binary output signal and configured to provide a reference signal of a value of a second term of the geometric sequence, such that the first term and the second term are of equidistant order at both ends of the geometric sequence, the second term being representative of the electrical detection threshold.

TECHNICAL FIELD

The present invention relates to a device for selfadjusting anelectrical threshold for detecting a power failure as well as to amethod for determining the electrical threshold for detecting a powerfailure.

STATE OF THE ART

In the automotive electronic device, it is known to supervise the powerconsumption of an electric charge. In order to supervise a power excessor a power failure of the electric charge, it is known to control theproduct of the supply voltage of the charge by the current consumptionof the charge in order to evaluate the power consumption. The powerconsumption of the charge thus calculated is then compared with amaximum power threshold beyond which an electric charge failure can bediagnosed, and/or also with a minimum power threshold below which anelectric charge failure can also be diagnosed.

The existing devices require computing power as well as reaction timespenalizing the consumption and responsiveness of the existing devices.

It is therefore important to propose a new solution solving thisproblem.

SUMMARY OF THE INVENTION

According to the invention, a device for selfadjusting an electricalthreshold for detecting an electric power consumption failure of anelectric charge, preferably of the charge of a motor vehicle, comprisesa plurality of reference signals of increasing values according to ageometric sequence for which the product of two terms of equidistantorder at both ends of the sequence equals a maximum reference power(Pref), the plurality of reference signals being representative of thevariation of a supply signal of the electric charge; the device furthercomprises a setpoint signal representative of the supply signal of theelectric charge; a framing unit including a plurality of successiveintervals of reference signals sequentially bounded by the terms of thegeometric sequence of the plurality of reference signals, the devicefurther comprises a measurement signal including the setpoint signal, aplurality of output signals, logic signal processing means configured toassign to a first output signal of the plurality of output signals abinary state of belonging of the setpoint signal to a first interval ofreference signals including a first term of the geometric sequence, andat least one electrical switch configured to be controlled by the firstoutput signal and configured to provide a reference signal of theplurality of reference signals of a value of a second term of thegeometric sequence, such that the first term and the second term are ofequidistant order at both ends of the geometric sequence, the secondterm being representative of the electrical threshold for detecting anelectric power consumption failure of the electric charge.

The logic signal processing means may be configured to assign to theother binary output signals of the plurality of binary output signals abinary state of nonbelonging of the setpoint signal to the otherintervals of reference signals.

The plurality of reference signals may comprise successive electricalconnection nodes of a resistor network in series.

The logic signal processing means may include a plurality of comparatorsordered from 1 to N each comprising respectively a reference signalordered from 1 to N of the plurality of reference signals, eachcomparator also comprising the setpoint signal, so as to be able tocompare the setpoint signal with each reference signal; a plurality oflogic devices ordered from 1 to N-1 comprising a plurality of‘inverter’-type logic gates ordered from 1 to N-1, each input of each‘inverter’-type logic gate of order 1 to N-1 being respectivelyelectrically connected to the output of each comparator of order 2 to N;and also comprising a plurality of twoinput ‘AND’-type logic gatesordered from 1 to N-1, each first input of each twoinput ‘AND’-typelogic gate ordered from 1 to N-1 being respectively electricallyconnected to each output of each ‘inverter’-type logic gate ordered from1 to N-1, each second input of each two-input ‘AND’-type logic gateordered from 1 to N-1 being respectively electrically connected to eachordered output of each comparator of order 1 to N-1; the plurality of‘AND’-type logic gates of order 1 to N-1 including respectively theplurality of output signals ordered from 1 to N-1 of the framing unit.

According to the invention, a method for determining an electricalthreshold for detecting a failure of electric power consumed by anelectric charge, preferably an electric charge of a motor vehicle,comprises the steps of:

determining a maximum reference power (Pref) representative of themaximum allowable power of the electric charge;

providing a plurality of reference signals of increasing valuesaccording to a geometric sequence for which the product of two terms ofequidistant order at both ends of the sequence equals the maximumreference power (Pref); the plurality of reference signals beingrepresentative of the variation of a supply signal of the electriccharge;

defining a plurality of successive intervals of reference signalssuccessively bounded by the terms of the geometric sequence of theplurality of reference signals;

providing a setpoint signal representative of the supply signal of theelectric charge;

allocating to the setpoint signal a first term of the geometric sequenceof an interval of reference signals framing as close as possible thevalue of the setpoint signal;

allocating to the electrical threshold for detecting a failure ofelectric power consumed by the electric charge a second term of thegeometric sequence of reference signals such that the first term and thesecond term are of equidistant order at both ends of the sequence.

Other objects and advantages of the present invention will becomeapparent in light of the following description.

BRIEF DESCRIPTION OF THE DRAWINGS

Other characteristics, objects and advantages of the invention willbecome apparent upon reading the following detailed description, and inlight of the appended drawings given by way of nonlimiting example andin which:

FIG. 1 represents a block diagram of the device for selfadjusting anelectrical threshold for detecting a power failure according to a firstembodiment of the invention.

FIG. 2 represents a block diagram of the selfadjusting device accordingto a second embodiment of the invention.

FIG. 3 represents a block diagram of the selfadjusting device accordingto a third embodiment of the invention.

FIG. 4 represents a flowchart of a method for determining an electricaldetection threshold according to a first embodiment of the method.

DETAILED DESCRIPTION

According to FIG. 1, a device for selfadjusting 10 an electricalthreshold for detecting Sth an electric power failure of an electriccharge is represented. Preferably, said threshold is a comparisonthreshold provided to be able to detect an electric power consumptionfailure of a charge of a motor vehicle.

The selfadjusting device 10 is configured to provide a selfadjustingelectrical threshold for detecting an electric power failure based onthe variations of a supply signal of the electric charge.

The selfadjusting device 10 comprises a plurality of reference signalsSRI, SRN of increasing values according to a geometric sequence forwhich the result of the product of any two terms of equidistant order atboth ends of the sequence is generally constant. The result of theproduct of the any two terms of equidistant order at both ends is alsoequivalent to the product of the ends of the geometric sequence. Theparticularity of the invention lies in the exploitation of this propertyspecific to the geometric suites. According to the invention, althoughthe terms of the geometric sequence representative of the plurality ofreference signals SR₁, SR_(N) are of the same nature, namelyrepresentative of an electric current or of an electric voltage, theabsolute value of each of two equidistant terms from the ends of thesequence is an image for one of the two terms of the value of a supplyvoltage of the electric charge, the other term being the image of asupply current of the electric charge, so that the product of the valueof the two terms represent an image of a maximum reference power (Pref)representative of the maximum power allowable by the electric charge.The plurality of reference signals SRi, SR_(N) is therefore an image ofthe possible variation of a supply signal of the electric charge.

The power supply of an electric charge of a motor vehicle may, forexample, in a nonlimiting manner, in some cases, vary between 0 Volt,during a power cutoff, up to 18 volts depending on the conditions of useof the vehicle battery. The plurality of reference signals SR₁, SR_(N)is generally an indirect representation of the variations of the batteryvoltage; in other words, the plurality of reference signals SR₁, SR_(N)comprises reference signals (SR₁, SR_(N)) of values proportional to thevalues of voltages of the vehicle battery.

In order to supervise the electric power consumed by the electriccharge, the self adjusting device 10 comprises a setpoint signal Screpresentative of the supply signal of the electric charge. The setpointsignal Sc can be directly the supply signal of the electric charge, suchas the voltage of the vehicle battery or the electric current consumedby the charge on the battery, or an image of the supply signal of theelectric charge, such as a reduced value of the voltage of the batteryor a reduced value of the electric current consumed by the charge on thebattery.

According to FIG. 1, the selfadjusting device 10 comprises a framingunit 12 including as input signals a plurality of successive intervalsI₁, I₂, I_(N-1) of the type [SR₁, SR₂[, [SR₂, SR₃[, [SR_(N-1), SR_(N)[successively bounded by the terms of the geometric sequence of theplurality of reference signals SR₁, SR_(N) and also a measurement signalincluding the setpoint signal Sc. The framing unit 12 is configured todetermine an interval I₂ bounded by two successive terms of thegeometric sequence, that is to say by two values of the successivereference signals of the type [SR₂, SR₃[, for framing the value of thesetpoint signal Sc.

The framing unit 12 also comprises a plurality of binary output signalsSS₁, SS_(N-1) and logic signal processing means 14 configured to assignto a first binary output signal SS₂ of the plurality of binary outputsignals SS₁, SS_(N-1) a binary state of belonging of the setpoint signalSc to a first interval I₂ of the type [SR₂, SR₃[ including a first termof the geometric sequence of a value of the reference signal SR₂ oflower bound of the first interval I₂. A belonging binary state may be a‘high’ logic level, i.e. a binary value of ‘1’.

The logic signal processing means 14 are also configured to assign tothe other binary output signals SS₁, SS₃, SS_(N-1) of the plurality ofbinary output signals SS₁, SS_(N-1) a binary state of nonbelonging ofthe setpoint signal Sc to the other intervals I₁, I₃, I_(N-1) of thetype [SR₁, SR₂[, [SR₃, SR₄[, [SR_(N-1), SR_(N)[. A nonbelonging binarystate may be a ‘low’ logic level, i.e. a binary value of ‘0’.

In other words, each interval I₁, I_(N-1) of the type [SR₁, SR₂[,[SR_(N-1)[, SR_(N)[cooperates with a determined binary output signalSS₁, SS_(N-1) of the framing unit 12 so that the binary state of eachbinary output SS₁, SS_(N-1) indicates the belonging or nonbelonging ofthe value of the setpoint signal Sc to a single determined interval 12of the type [SR₂, SR₃[. The value of the setpoint signal Sc isrepresentative of the amplitude of the supply signal of the charge.

According to FIG. 1, the selfadjusting device 10 includes a switchingunit 16 comprising a plurality of electrical switches EC₁, EC_(N-1) eachable to switch a single reference signal SR_(N-1) of the plurality ofreference signals SR₁, SR_(N), each reference signal SR₁, SR_(N) beingeach able to be switched by a single electrical switch EC2. Eachelectrical switch ECi, EC_(N-1) is an element with an input S_(EEC1),S_(EECN-1), an output S_(SEC1), S_(SECN-1) and a control signal S_(cd1),S_(cdN-1) allowing the switching of the input signal S_(EEC1) of theswitch on its output S_(SEC1)

According to the embodiment of FIG. 1, one of the electrical switchesEC₂ is configured to be controlled by the first binary output signal SS₂and is configured to provide a reference signal SR_(N-1) of theplurality of reference signals SR₁, SR_(N) of a value of a second termof the geometric sequence of a second interval I_(N-1) of the type[SR_(N-1), SR_(N)[, such that the first term and the second term are ofequidistant order at both ends of the geometric sequence, the secondterm being representative of the electrical threshold for detecting Stha power failure provided to be able to detect a electric powerconsumption failure of the electric charge.

In other words, when the first binary output signal SS₂ is in a binarystate of the type ‘1’, said first binary output signal SS₂ allows theclosure of a single electrical switch EC₂ for switching the second termof the geometric sequence of the second interval I_(N-1) of the type[SR_(N-1), SR_(N)[, such that the result of the product of the firstterm with the second term represents the maximum reference powerrepresentative of the maximum power allowable by the electric charge.The output signal S_(SEC2) of the single electrical switch EC₂ subjectedto closure control therefore represents the electrical threshold fordetecting Sth a power failure.

The other electrical switches EC₁, EC₃, EC_(N-1) are configured to becontrolled by the other binary output signals SS₁, SS₃, SS_(N-1) sothat, when these are all in a binary state of nonbelonging of thesetpoint signal SC to the other intervals I₁, I₃, I_(N-1) of the type[SR₁, SR₂[, [SR₃, SR₄[, [SR_(N-1), SR_(N)[, the other electricalswitches EC₁, EC₃, EC_(N-1) remain open so that no other referencesignal SR_(N), SR_(N-2), SR₂ is switched by the other electricalswitches EC₁, EC₃, EC_(N-1).

The advantage of this solution is to be able to monitor a power withoutneeding a voltage/current multiplier in order to compare the calculatedpower with a predetermined maximum power threshold. The device allowsovercoming the complexity of existing solutions by proposing a devicethat automatically provides an electrical threshold for detecting Sth apower failure representative of the maximum voltage or maximum currentthat the charge must not exceed based respectively on the supply voltageor current of the charge.

According to one embodiment of the selfadjusting device 10 representedin FIG. 2, the plurality of reference signals SR₃, SR_(N) is a pluralityof N reference voltages V₁, V_(N) ordered from 1 to N obtained at eachelectrical connection node of a network of electrical resistors 18connected in series. The electrical resistor network 18 is connected atone of its ends to a stabilized voltage V_(s) for supplying theelectrical resistor network 18 and at its other end to an electricalground 20 of the selfadjusting device 10.

In order to obtain a plurality of N reference voltages V₁, V_(N) ofincreasing values according to a geometric sequence with determinedcommon ratio, the resistor network 18 comprises a plurality of Nresistors R₁, R_(N) ordered from 1 to N, for which the resistor valuesR₂, R_(N) of order 2 to N increase successively at a constant ratio, theresistor R_(N) of order N being connected to the stabilized voltage Vsfor supplying the electrical resistor network 18 in series. The value ofthe resistor R₁ of order 1 connected to the electrical ground 20 isadjusted so that each reference voltage V₁, V_(N), excluding zerovoltage of the electrical ground, also increases according to the sameconstant ratio as the plurality of resistors R₂, R_(N) of order 2 to N.

The plurality of N reference voltages V₁, V_(N) of increasing valuesdefines the plurality of successive intervals I_(I), I_(N-1) of the type[V₁, V₂[, [V₂, V₃[, [V_(N-1), V_(N)[ successively bounded by the valuesof reference voltages V₁, V_(N) at the successive electrical connectionnodes. The successive intervals I₁, I_(N-1) are ordered from 1 to N-1.

According to this embodiment, there will be considered the N referencevoltages V₁, V_(N) of increasing successive values ranging from V₁ toV_(N) as well as the sequence of successive intervals I₁, I_(N-1) of thetype semiopen on the right, that is say of the type [V₁, V₂[, [V₂, V₃[ .. . and so on up to the interval of order N-1 of the type [V_(N-1),V_(N)[.

According to the embodiment represented in FIG. 2, the logic signalprocessing means 14 include a plurality of N-1 comparators C₁, C_(N-1)ordered from 1 to N-1, each comparator C₁, C_(N-1) including a singlereference voltage V₁, V_(N-1) from the plurality of reference voltagesV₁, V_(N), each of the reference voltages V₁, V_(N-1) being connected toa single comparator C₁. Each reference voltage V₁, V_(N-1) of order 1 toN-1 is connected respectively to the negative bound of each comparatorC₁, C_(N-1) of order 1 to N-1. In other words, the reference voltage V₁of order 1 is connected to the negative bound of the comparator C₁ oforder 1, the reference voltage V₂ of order 2 is connected to thenegative bound of the comparator C₂ of order 2, and so on up to thereference voltage V_(N-1) of order N-1 connected to the comparatorC_(N-1) of order N-1.

According to the embodiment of FIG. 2, the setpoint signal Sc is asetpoint voltage Vc representative of the supply voltage of the electriccharge. Each comparator C₁, C_(N-1) is configured to compare thesetpoint voltage V_(c) with its respective reference voltage V₁, V_(N-1)so that only the comparators C₁, C_(N-1) having as reference voltage V₁,V_(N-1) a voltage of amplitude lower than the amplitude of the setpointvoltage Vc can provide at the output of the comparator a ‘high’ logiclevel, i.e. a binary value of ‘1’. In this case, the other comparatorsprovide at the output of the comparator a ‘low’ logic level, i.e. abinary value of ‘0.

In other words, when the amplitude of the setpoint voltage Vc is greaterthan a reference voltage V_(M) of any order M from 1 to N-1, thecomparators C₁, C_(M) of order 1 to M provide at the output of thecomparator a ‘high’ logic level, i.e. a binary value of ‘1’, thecomparators C_(M+1), C_(N-1) of order M+1 to N-1 provide at the outputof the comparator a ‘low’ logic level, i.e. a binary value of ‘0’.

According to the embodiment represented in FIG. 2, the logic signalprocessing means 14 include a plurality N-2 of logic devices DL₁,DL_(N-2) ordered from 1 to N-2. Each logic device DL₁, DL_(N-2) of order1 to N-2 provides a plurality N-2 of binary output signals SS₁, SS_(N-2)of belonging or nonbelonging of the setpoint voltage Vc to an intervalI₁, I_(N-2) of order 1 to N-2 of the type [V₁, V₂[, [V_(N-2), V_(N-1)[.

The output of the comparator C_(N-1) of order N-1 directly provides abinary output signal SS_(N-1) of order N-1 of belonging or nonbelongingof the setpoint voltage to the interval I_(N-1) of order N-1 of the type[V_(N-1), V_(N)[.

It is obvious that the setpoint voltage Vc cannot belong to more thanone reference voltage interval I₁. In other words, the setpoint voltageVc cannot be framed by more than one reference voltage interval I₁.

For this purpose, each logic device DL₁, DL_(N-2) includes aninverter-type logic gate INV₁, INV_(N-2) whose input is electricallyconnected to the output of the comparator C₂, C_(N-1) of higher order.In other words, the input of the ‘inverter’-type logic gate INV_(M−1) oforder M−1 is electrically connected to the output of the comparator CMof order M.

In addition, each logic device DL₁, DL_(N-2) includes a twoinput‘AND’-type logic gate AND₁, AND_(N-2). Each ‘AND’-type logic gate AND₁,AND_(N-2) includes a first input electrically connected to the output ofthe ‘inverter’-type logic gate INV₁, INV_(N-2) of the same order, theother input of the ‘AND’-type logic gate AND₁, AND_(N-2) beingelectrically connected to the output of the comparator C₁, C_(N-2) ofthe same order. In other words, the first input of the ‘AND’-type logicgate AND_(M−1) of order M−1 is electrically connected to the output ofthe ‘inverter’-type logic gate INV_(M−1) of order M−1, the other inputof the ‘AND’-type logic gate AND_(M−1) of order M−1 is electricallyconnected to the comparator C_(M−1) of order M−1.

According to the arrangement of the plurality of logic devices DL₁,DL_(N-2) of the embodiment of FIG. 2, when the comparators C₁, C_(M) oforder 1 to M each provide a comparator output of ‘high’ logic level, thebinary outputs SS₁, SS_(M−1) of belonging or non belonging of thesetpoint voltage Vc to an interval I₁, I_(M−1) of order 1 to M−1 ofreference signals are then in a ‘low’ logic state, meaning thenonbelonging of the setpoint voltage Vc to the successive intervals I₁,I_(M−1) of order 1 to M−1. Indeed, the ‘inverter’-type logic gates INV₁,INV_(M−1) of order 1 to M−1 set a ‘low’ logic state to the first inputof each ‘AND’-type logic gate AND₁, AND_(M−1) of order 1 to M−1.

In this case, the comparator C_(M+1) of order M+1 provides a low logiclevel at the input of the ‘invertert’-type logic gate INV_(M) of orderM, so that the first input of the ‘AND’-type logic gate AND_(M) of orderM is in a ‘high’ logic state.

In this case, only the binary output SS_(M) of order M of belonging ornonbelonging of the setpoint voltage Vc to an interval I_(M) of order Mof reference voltages is in a ‘high’ state, meaning the belonging of thesetpoint voltage Vc to the single interval I_(M) of order M.

According to the embodiment represented in FIG. 2, the selfadjustingdevice 10 includes a plurality N-1 of electrical switches SW₁, SW_(N-1)ordered from 1 to N-1. Each electrical switch SW₁, SW_(N-1) of order 1to N-1 is respectively controlled by a binary output signal SS₁,SS_(N-1) of belonging or nonbelonging of the setpoint voltage Vc to aninterval I₁, I_(N-1) of order 1 to N-1 of reference signals. Eachelectrical switch SW₁, SW_(N-1) is in a closed or on state when itscontrol signal is in a ‘high’ logic state. In other words, an electricalswitch SW_(M) of any order M is configured to switch an electricalsignal present on its input toward its output when its control signal isa binary output SS_(M) of a logic device DL_(M) of order M indicatingthe belonging of the setpoint voltage to an interval I_(M) of order M ofreference signals.

Conversely, each electrical switch SW₁, SW_(N-1) is in an open or offstate when its control signal is in a ‘low’ logic state so that a signalpresent on the input of the electrical switch SW₁, SW_(N-1) is notswitched at the output of the electrical switch SW₁, SW_(N-1).

According to the description of the plurality of logic devices DL₁,DL_(N-2), not more than one electrical switch SW₁ can be subjected toclosure control since a single binary output SS₁ of belonging ornonbelonging of the setpoint voltage Vc to an interval I₁ of referencesignals can be in a ‘high’ state, meaning the belonging of the setpointvoltage Vc to a single reference voltage interval I₁.

According to the embodiment of FIG. 2, all the outputs of the pluralityof electrical switches SW₁, SW_(N-1) are electrically connected togetherso as to form the electrical threshold for detecting Sth the electricpower failure consumed by the electric charge. For this purpose, theelectrical threshold for detecting Sth the electric power failure istherefore the input signal of the electrical switch SW1 subjected toclosure control.

Indeed, according to the embodiment of FIG. 2, each input of eachelectrical switch SW₁, SW_(N-1) of order 1 to N-1 is electricallyconnected respectively to a reference voltage of order N to 2; eachelectrical switch SW1, SW_(N-1) of order 1 to N-1 being respectivelycontrolled by a binary output SS₁, SS_(N-1) of order 1 to N-1, ofbelonging or nonbelonging of the setpoint voltage Vc to an interval I₁,I_(N-1) of order 1 to N-1.

In other words, the input signal of the electrical switch SW_(N-1) oforder N-1 is electrically connected to the reference voltage V₂ of order2; the input signal of the electrical switch SW_(N-2) of order N-2 iselectrically connected to the reference voltage V₃ of order 3, and so onup to the input signal of the electrical switch of order 2 electricallyconnected to the reference voltage V_(n-1) of order N-1, and finally upto the input signal of the electrical switch SW₁ of order 1 electricallyconnected to the reference voltage V_(N) of order N .

According to this arrangement, by virtue of the mathematical propertiesof the geometric sequence formed by the plurality N of the referencevoltages V₁, V_(N), the product of the value of the signal switched bythe electrical switch SW₁ controlled by the binary output signal SS₁ ofthe logic device DL₁ indicating the belonging of the setpoint voltage Vcto a reference voltage interval I₁ by the value of the lower bound ofsaid interval I₁ is representative of the maximum reference powerrepresentative of the maximum power allowable by the electric charge.

In other words, the threshold for detecting Sth a power failure providedby the self-adjusting device 10 is the value of the reference voltageV_(N-1) of a first term of the geometric sequence of the plurality ofreference voltages V₁, V_(N) such that this first term and the secondterm of the geometric sequence representative of the lower bound of theinterval I₂ of belonging of the setpoint voltage V_(c) are termsequidistant from the ends of the geometric sequence of the plurality ofreference voltages V₁, V_(N).

According to the particular embodiment of FIG. 3, the resistor network18 may comprise 24 resistors R₁, R₂₄ for which the theoretical value ofthe resistor R₂ of order 2 is equal to 123.74 Ohm, and for which theconstant ratio between two resistors R2, R3 of successive order of 2 to24 equal to 1.1 so that the value of the resistor R24 of order 24 isequal to 1000 Ohm. The theoretical value of the resistor R₁ of order 1can be adjusted to 1242 Ohm so that the stabilized supply voltage Vs atthe voltage node of order 24 decreases according to the ratio ofconstant order 1.1 successively up to the node of order 1, that is tosay the electrical connection node between the resistor R₁ of order 1and the resistor R₂ of order 2. The advantage of this particularembodiment lies in the fact that the values of the resistors R2, R24 oforder 2 to 24 can generally correspond in practice to the successivestandardized values of the resistors of the series E24, the value of theresistor R₁ of order 1 can also generally correspond to a standardizedvalue of a resistor of the series E24.

For this particular nonlimiting example, by having for example astabilized voltage Vs for supplying the resistor network of 3 volts, thereference voltage V₂₄ of order 24 will be 3 volts, the reference voltageV₂₃ of order 23 will be equal to 2.73 volts and so on, the referencevoltage V₂ of order 2 will be equal to 0.37 Volt and finally thereference voltage V of order 1 will be equal to 0.34 volt.

According to this example, it is possible to deduce the 23 successiveintervals I₁, I₂₃ of reference voltages, such as for example, the twofirst intervals: I₁[0.34 Volt, 0.37 Volt[ and I₂[0.37 Volt, 0.41 Volt [and the last interval I₂₃[2.73 Volts, 3 Volts[.

According to this example, the result of the product of two equidistantorder terms at both ends of the geometric sequence formed by thereference voltages, that is to say for example, the product of thereference voltage V₂₄ of order 24 with the reference voltage V₁ of order1, as well as the product of the reference voltage V₂₃ of order 23 withthe reference voltage V₂ of order 2, or the product of the referencevoltage V₁₃ of order 13 with the reference voltage V₁₂ of order 12, isof order 1.

According to this example, the plurality of the reference voltages V₁,V₂₄ is therefore dimensioned so that the selfadjusting device 10 allowsmonitoring at least one electrical device, such as a vehicle electriccharge, that must not consume a maximum power greater than 1 Watt, themaximum power being the reference power defined by the self adjustingdevice 10.

According to FIG. 3, the setpoint voltage Vc is an electric voltage thatcan vary from 0 Volt to 3 Volts. This setpoint voltage Vc can be animage of the battery voltage. According to this example, a device forreducing a factor 6 of the battery voltage allows the selfadjustingdevice 10 to have a reduced voltage of the battery as a setpoint voltageVc.

According to this example, the selfadjusting device 10 comprises 24comparators C₁, C₂₄ ordered from 1 to 24. Each comparator C₁, C₂₄comprises respectively on its negative input bound a reference voltageV₁, V₂₄ of order 1 to 24. In other words, the comparator C₁ of order 1comprises a reference voltage V₁ on its negative bound of 0.34 Volt, thecomparator C₂ of order 2 comprises a reference voltage V₂ on itsnegative bound of 0.37 Volt, and so on up to the comparator C₂₃ of order23 comprising a reference voltage V₂₃ of 2.73 volts, the comparator C₂₄of order 24 comprising as reference voltage V₂₄ the stabilized voltageVs for supplying the resistor network 18 namely 3 volts.

The comparator C₂₄ of order 24, not present in the embodiment of FIG. 2,is an option for managing the overvoltage situations beyond the maximumestimated voltage of the battery voltage. This comparator does notquestion the operation of the selfadjusting device 10 as describedaccording to FIG. 2.

According to FIG. 3, in the case of a setpoint voltage Vc of 1.0 Volt,all the comparators C₁, C₁₂ having a reference voltage V₁, V₁₂ less than1.0 Volt provide at the output of the comparator C₁, C₁₂ a ‘high’ logiclevel, i.e. a binary value of ‘1’, the comparators C₁₃, C₂₄ having areference voltage greater than 1.0 Volt provide at the output of thecomparator C₁₃, C₂₄ a ‘low’ logic level, i.e. a binary value of ‘0’.According to this example, the comparators C₁, C₁₂ of order 1 to 12provide at the output of the comparator C₁, C₁₂ a high logic level, thecomparators C₁₃, C₂₄ of order 17 to 24 provide at the output of thecomparator a low logic level.

According to FIG. 3, the selfadjusting device 10 comprises 23 logicdevices ordered from 1 to 23.

Each of the 23 logic devices includes an ‘inverter’-type logic gateINV₁, INV₂₃ ordered from 1 to 23. According to a setpoint voltage Vc of1.0 Volt, the input signal of each ‘inverter’-type logic gate INV₁₂,INV₂₃ of order 12 to 23 is a ‘low’ logic level, i.e. a binary value of‘0’ provided respectively by the comparators C₁₃, C₂₄ of order 13 to 24.A contrario, the input of each ‘inverter’-type logic gate INV₁i, INV₁₁of order 1 to 11 is a ‘high’ logic level, i.e. a binary value of ‘1’provided respectively by the comparators C₂, C₁₂ of order 2 to 12.

Each of the 23 logic devices includes an ‘AND’-type logic gate AND₁,AND₂₃ ordered from 1 to 23. Each of the ‘AND’-type logic gates AND₁,AND₂₃ of order 1 to 23 comprises a first input electrically connectedrespectively to the output of each of the ‘inverter’ type logic gatesINV₁, INV₂₃ of order 1 to 23. Each of the ‘AND’-type logic gates AND₁,AND₂₃ of order 1 to 23 comprises a second input electrically connectedrespectively to the output of each of the comparators C₁, C₂₃ of order 1to 23.

According to the setpoint voltage Vc of 1.0 Volt, each of the ‘AND’-typelogic gates AND₁₃, AND₂₃ of order 13 to 23 provides a binary outputSS₁₃, SS₂₃ of nonbelonging of the setpoint voltage Vc to the intervalsI₁₃, I₂₃ of order 13 to 23, i.e. a binary output SS₁₃, SS₂₃ of ‘low’logic level, i.e. a binary value of ‘0’. Indeed, the setpoint voltage Vcof 1.0 Volt being lower than the reference voltage V₁₃ of order 13,namely a voltage value of 1.06 Volt, the logic outputs of thecomparators C₁₃, C₂₃ of order 13 to 23 provide respectively to each‘AND’-type logic gate AND₁₃, AND₂₃ of order 13 to 23, their second inputsignal of ‘low’ logic level, i.e. a binary value of ‘0’.

According to the setpoint voltage Vc of 1.0 Volt, the ‘AND’-type logicgate AND₁₂ of order 12 provides a binary output SS₁₂ of belonging of thesetpoint voltage Vc to the interval I₁₂ of order 12, i.e. a binaryoutput SS₁₂ of ‘high’ logic level of binary value equal to ‘1’ since thevalue of the setpoint voltage Vc of 1.0 Volt is framed by the intervalI₁₂ of order 12 bounded by the reference voltage V₁₂ of order 12 and thereference voltage V₁₂ of order 13 namely the interval semiopen on theright [0.96 Volt, 1.6 Volt[.

Indeed, since the setpoint voltage Vc of 1.0 Volt is greater than thelow reference voltage V₁₂ of the interval I₁₂ of order 12, namely avoltage value of 0.96 Volt, the comparator C₁₂ of order 12 provides tothe second input of the ‘AND’-type logic gate AND₁₂ of order 12 a ‘high’logic level, i.e. a binary value of ‘1’. Since the first input of the‘AND’-type logic gate AND₁₂ of order 12 is connected to the output ofthe ‘inverter’-type logic gate INV₁₂ of order 12, since said‘inverter’-type logic gate INV₁₂ of order 12 has as input signal theoutput of the comparator C₁₃ of order 13, i.e. a ‘low’ logic level,because the setpoint voltage Vc has a value lower than the referencevoltage V₁₃ of the comparator of order 13, then the first input of the‘AND’-type logic gate AND₁₂ of order 12 has a ‘high’ logic level, i.e. abinary value of ‘1’.

The two inputs of the ‘AND’-type logic gate AND₁₂ of order 12 having a‘high’ logic level, i.e. a binary value of ‘1’, said ‘AND’-type logicgate AND₁₂ of order 12 provides to the selfadjusting device 10 a binaryoutput SS₁₂ of order 12 of belonging of the setpoint voltage Vc to theinterval I₁₂ of order 12, i.e. a binary output SS₁₂ of ‘high’ logiclevel, i.e. a binary value of ‘1’.

According to the setpoint signal of 1.0 Volt, each ‘AND’-type logic gateAND₁, AND₁₁ of order 1 to 11 provides a binary output SS₁, SS₁₁ ofnonbelonging of the setpoint voltage Vc to the intervals I_(I), Ii₁₁ oforder 1 to 11, i.e. a binary output SS₁, SS₁₁ of ‘low’ logic level, i.e.a binary value of ‘0’, since the setpoint signal of 1.0 Volt is notframed by any interval I₁, I₁₁ of order 1 to 11; namely the firstinterval I₁ of the type semiopen on the right [0.34 Volt, 0.37 Volt],the second consecutive interval I₂ [0.37 Volt, 0.41 Volt[ and so on upto the eleventh interval I₁₁ bounded by the reference voltage V₁₁ oforder 11 and the reference voltage V₁₂ of order 12, namely the intervalsemiopen on the right [0.87 Volt, 0.96 Volt[.

Indeed, each comparator C₂, C₁₂ of order 2 to 12, respectively providesto each ‘inverter’-type logic gate INV₁, INV₁₁ of order 1 to 11, aninput signal of ‘high’ logic level, i.e. a binary value of ‘1’. Indeed,the value of the reference voltage V₂, V₁₂ of each comparator of order 2to 12 is less than the value of the setpoint voltage Vc. For example,the reference voltage V₁₂ of the comparator C₁₂ of order 12 is equal to0.96 Volt. As a result, each first input of each ‘AND’-type logic gateAND₁, AND₁₁ of order 1 to 11 has a ‘low’ logic level, i.e. a binaryvalue of ‘0’. As a result, each ‘AND’-type logic gate AND₁, AND₁₁ oforder 1 to 11 provides a binary output SS₁, SS₁₁ of nonbelonging of thesetpoint voltage Vc of a value equal to 1.0 Volt to the intervals I_(I),I₁₁ of order 1 to 11.

According to the setpoint voltage of a value equal to 1.0 Volt, only thebinary output signal SS₁₂ of order 12 of the logic signal processingmeans 14 provides a signal of belonging of the setpoint voltage Vc to aninterval I₁₂ of reference voltages, namely the belonging of the setpointvoltage Vc of 1.0 Volt to the interval I₁₂ of order 12, namely theinterval I₁₂ semiopen on the right [0.96 Volt, 1.06 Volt[.

According to FIG. 3, the selfadjusting device 10 of the electricaldetection threshold Sth includes 24 electrical switches SW₁, SW₂₄ordered from 1 to 24. Each electrical switch SW₁, SW₂₃ of order 1 to 23is respectively controlled by the binary output SS₁, SS₂₃ of belongingor nonbelonging of the setpoint voltage Vc to a determined intervalI_(I), I₂₃, the binary outputs SS₁, SS₂₃ being respectively the outputsof the ‘AND’-type logic gate AND₁, AND₂₃ of order 1 to 23. Theelectrical switch SW₂₄ of order 24 is controlled directly by the outputof the comparator C₂₄ of order 24.

The outputs of the electrical switches SW₁, SW₂₄ of order 1 to 24 areconnected together and provide the electrical threshold for detectingSth an electric power failure. For this purpose, each of the 24electrical switches SW₁, SW₂₄ is subjected to closure control when itscontrol signal is in a ‘high’ logic state. In this case no more than asingle electrical switch SW₁₂ is subjected to closure control since nomore than a single binary output SS₁₂ of belonging or nonbelonging ofthe setpoint voltage Vc to an interval I₁₂ of reference voltages canassume a belonging state, i.e. a ‘high’ logic state.

According to the setpoint voltage Vc of a value equal to 1.0 Volt, onlythe binary output signal SS₁₂ of order 12 of the logic signal processingmeans 14 provides a signal of belonging of the setpoint voltage Vc tothe interval I₁₂ of order 12. As a result, only the electrical switchSW₁₂ of order 12 is switched on or closed, so that the input signal ofthe electrical switch SW₁₂ of order 12 is switched on the output of theelectrical switch SW₁₂ of order 12.

According to the embodiment of FIG. 3, each input of each electricalswitch SW₁, SW₂₄ of order 1 to 24 is electrically connected respectivelyto a reference voltage V₂₄, V₁ of opposite order 24 to 1. In otherwords, the input of the electrical switch of order 1 is connected to thereference voltage of order 24, the input of the electrical switch SW₁ oforder 1 is connected to the reference voltage V₂₄ of order 24, and so onup to the input of the electrical switch SW₂₄ of order 24 connected tothe reference voltage of order 1, so that the product of the referencevoltage of each comparator C₁, C₂₄ of order 1 to 24 by respectively eachreference voltage V₂₄, Vi of the input signal of each electrical switchSW₁, SW₂₄ of order 1 to 24 is constant and representative of the maximumreference power (Pref), namely 1 Watt.

According to FIG. 3, the setpoint voltage of a value equal to 1.0 Voltbelongs to the interval I₁₂ of reference voltage of order 12 bounded bythe reference voltage V₁₂ of order 12 of a value equal to 0.96 Volt andby the reference voltage V₁₃ of order 13 of a value equal to 1.06 Volt.The lower bound of the interval I₁₂ of order 12 is the reference voltageV₁₂ of the comparator C₁₂ of order 12. The input signal of theelectrical switch SW₁₂ of order 12 is therefore connected to thereference voltage V₁₃ of order 13. The order of the reference voltageV₁₃ of the input signal of the switch SW₁₂ of order 12 and the order ofthe reference voltage V₁₂ of the comparator C₁₂ of order 12 are twoterms of the geometric sequence of the plurality of reference voltagesequidistant from the ends of the sequence of order 24. Indeed, thereference voltage V₁₂ of order 12 is at a distance of 12 from thereference voltage V₂₄ of order 24, the reference voltage V₂₄ of order 24representing the upper end of the geometric sequence, the referencevoltage V₁₃ of order 13 being at a distance of 12 from the referencevoltage V₁ of order 1, the reference voltage V₁ i of order 1representing the low end of the geometric sequence.

Consequently, according to the setpoint voltage of a value equal to 1.0Volt, the electrical switch SW₁₂ of order 12 provides an electricalthreshold for detecting Sth an electric power failure of absolute valueequivalent to the reference voltage V₁₃ of order 13, namely 1.06. Theproduct of the reference voltage V₁₂ of order 12, corresponding to afirst term of the geometric sequence, by the reference voltage V₁₃ oforder 13 representing a second term of the geometric sequence istherefore 0.96×1.06, namely a value equal to 1.0 comparable to thepredetermined maximum reference power of 1 W.

According to the embodiments of FIGS. 1, 2 and 3, the invention alsocomprises a method for determining 100 an electrical threshold fordetecting Sth an electric power failure consumed by an electric charge,preferably an electric charge of a motor vehicle. The method 100comprises a first step of determining 110 the maximum reference power(Pref) representative of the allowable maximum power of the electriccharge. The step of determining 110 the maximum reference power allowsdimensioning the geometric sequence of reference signals such that theproduct of two terms equidistant from the ends of the geometric sequenceis equivalent to the reference power.

A second step 120 of the method 100 consists in providing a plurality ofreference signals SR₁, SRN of increasing values according to a geometricsequence for which the product of two equidistant order terms at bothends of the sequence equals the maximum reference power (Pref); theplurality of reference signals SR₁, SRN being representative of thevariation of a supply signal of the electric charge.

The plurality of reference signals SR₁, SR_(N) allows among othersframing a setpoint signal Sc representative of the power supply of theelectric charge by two successive values of reference signals SR₁, SR₂so as to be able to approximate the setpoint signal Sc to a referencesignal SR₁.

As a result, the method comprises a third step of defining 130 aplurality of successive intervals I_(I), I_(N-1) successively bounded bythe terms of the geometric sequence of the plurality of referencesignals SR₁, SR_(N) and also a fourth step of providing 140 the setpointsignal Sc representative of the supply signal of the electric charge.

To frame the setpoint signal, the method comprises a fifth step ofallocating 150 to the setpoint signal Sc a first term of the geometricsequence of an interval I₁ of reference signals framing as close aspossible the value of the setpoint signal Sc.

Finally, in order to be able to provide the electrical threshold fordetecting an electric power failure, the method comprises a sixth stepof allocating 160 to the electrical threshold for detecting Sth afailure of electric power consumed by the electric charge a second termof the geometric sequence of reference signals such that the first termand the second term are of equidistant order at both ends of thesequence.

1. A device for selfadjusting an electrical threshold for detecting anelectric power consumption failure of an electric charge, theselfadjusting device comprising: a plurality of reference signals ofincreasing values according to a geometric sequence for which theproduct of two terms of equidistant order at both ends of the sequenceequals a maximum reference power; the plurality of reference signalsbeing representative of the variation of a supply signal of the electriccharge; a setpoint signal representative of the supply signal of theelectric charge; a framing unit including: a plurality of successiveintervals of reference signals successively bounded by the terms of thegeometric sequence of the plurality of reference signals; a measurementsignal including the setpoint signal; a plurality of binary outputsignals; a logic signal processing means configured to assign to a firstbinary output signal of the plurality of binary output signals a binarystate of belonging of the setpoint signal to a first interval ofreference signals including a first term of the geometric sequence; andat least one electrical switch configured to be controlled by the firstbinary output signal and configured to provide a reference signal of theplurality of reference signals of a value of a second term of thegeometric sequence, such that the first term and the second term are ofequidistant order at both ends of the geometric sequence, the secondterm being representative of the electrical threshold for detecting anelectric power consumption failure of the charge.
 2. The selfadjustingdevice of claim 1, characterized in that the logic signal processingmeans are configured to assign to the other binary output signals of theplurality of binary output signals a binary state of nonbelonging of thesetpoint signal to the other intervals of reference signals.
 3. Theselfadjusting device of claim 1, characterized in that the plurality ofreference signals comprise successive electrical connection nodes of aresistor network in series.
 4. The selfadjusting device of claim 1,wherein the logic signal processing means further includes: a pluralityof comparators ordered from 1 to N each comprising respectively areference signal ordered from 1 to N of the plurality of referencesignals, each comparator also comprising the setpoint signal, so as tobe able to compare the setpoint signal with each reference signal; aplurality of logic devices ordered from 1 to N-1 comprising: a pluralityof ‘inverter’-type logic gates ordered from 1 to N-1, each input of each‘inverter’-type logic gates of order 1 to N-1 being respectivelyelectrically connected to the output of each comparator of order 2 to N;a plurality of two-input ‘AND’-type logic gates ordered from 1 to N-1,each first input of each twoinput ‘AND’-type logic gate ordered from 1to N-1 being respectively electrically connected to each output of each‘inverter’-type logic gate ordered from 1 to N-1, each second input ofeach twoinput ‘AND’-type logic gate ordered from 1 to N-1 beingrespectively electrically connected to each ordered output of eachcomparator of order 1 to N-1; wherein the output of each of the‘AND’-type logic gates of order 1 to N-1 including respectively theplurality of binary output signals ordered from 1 to N-1 of the framingunit.
 5. A method for determining an electrical threshold for detectinga failure of electric power consumed by an electric charge, the methodcomprising: determining a maximum reference power representative of themaximum allowable power of the electric charge; providing a plurality ofreference signals of increasing values according to a geometric sequencefor which the product of two terms of equidistant order at both ends ofthe geometric sequence equals the maximum reference power, wherein theplurality of reference signals being representative of the variation ofa supply signal of an electric charge; defining a plurality ofsuccessive intervals of reference signals successively bounded by theterms of the geometric sequence of the plurality of reference signals;providing a setpoint signal representative of the supply signal of theelectric charge; allocating to the setpoint signal a first term of thegeometric sequence of an interval of reference signals framing as closeas possible the value of the setpoint signal; allocating to theelectrical threshold for detecting a failure of electric power consumedby the electric charge a second term of the geometric sequence ofreference signals such that the first term and the second term are ofequidistant order at both ends of the sequence.